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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIFE32251B-R68MS 데이터시트(PDF) 124 Page - Texas Instruments |
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PIFE32251B-R68MS 데이터시트(HTML) 124 Page - Texas Instruments |
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124 / 157 page  124 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Detailed Description Copyright © 2014–2016, Texas Instruments Incorporated 6.6.1.58 TEMPCRIT Register (address = 0xEB) [reset = 00000000] Figure 6-80. TEMPCRIT Register Format B7 B6 B5 B4 B3 B2 B1 B0 RESERVED_T EMPCRIT[1] RESERVED_T EMPCRIT[0] LDO1_CRIT VR5_CRIT VR4_CRIT VR3_CRIT VR2_CRIT VR1_CRIT 0 0 0 0 0 0 0 0 R R RW RW RW RW RW RW LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6-61. TEMPCRIT Register Field Descriptions Bit Field Type Reset Description 7:6 RESERVED_TEMPCRIT[1:0] R 00 Read Always Returns '0' 5 LDO1_CRIT RW 0 LDO1 CRITTEMP 0: Not asserted, 1: Asserted, Regulator at critical temperature, write '1' to clear 4 VR5_CRIT RW 0 VR5 CRITTEMP 0: Not asserted 1: Asserted, Regulator at critical temperature, write '1' to clear 3 VR4_CRIT RW 0 VR4 CRITTEMP 0: Not asserted 1: Asserted, Regulator at critical temperature, write '1' to clear 2 VR3_CRIT RW 0 VR3 CRITTEMP 0: Not asserted 1: Asserted, Regulator at critical temperature, write '1' to clear 1 VR2_CRIT RW 0 VR2 CRITTEMP 0: Not asserted 1: Asserted, Regulator at critical temperature, write '1' to clear 0 VR1_CRIT RW 0 VR1 CRITTEMP 0: Not asserted 1: Asserted, Regulator at critical temperature, write '1' to clear |
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