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PIFE32251B-R68MS 데이터시트(PDF) 140 Page - Texas Instruments |
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PIFE32251B-R68MS 데이터시트(HTML) 140 Page - Texas Instruments |
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140 / 157 page ![]() Iout (A) 0 1 2 3 4 5 6 7 0 10 20 30 40 50 60 70 80 90 100 D001 Vin=5.40V Vin=8.10V Vin=8.70V Vin=13.50V Iout (A) 0.0 0.5 1.0 1.5 2.0 2.5 10 20 30 40 50 60 70 80 90 100 D001 Vin=2.97V Vin=3.30V Vin=3.63V 140 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Application and Implementation Copyright © 2014–2016, Texas Instruments Incorporated 7.2.4.2.1 Output Inductance and Capacitance Following the recommend design procedure in Section 7.2.2 will yield output inductance and capacitance similar to Table 7-4. Table 7-4. SkyLake and Kabylake Volume Configuration Output L and C VRx OUTPUT INDUCTANCE MINIMUM OUTPUT CAPACITANCE RECOMMENDED OUTPUT CAPACITORS CAPACITOR MANUFACTURER VR1 0.56 µH 160 µF 1 x GRM31CR60G227ME11 and 1 x ZRB18AR60G476ME01 muRata VR2 0.68 µH 47 µF 4 x ZRB18AR60G476ME01 muRata VR3 1 µH 87 µF 2 x GRM31CR60G227ME11 muRata VR4 0.56 µH 117 µF 1 x GRM31CR60G227ME11 muRata VR5 2.2 µH 76 µF 8 x GRM21BR61A476ME15 muRata 7.2.4.3 Application Performance Curves Table 7-5. Application Curves Overview TYPE DESCRIPTION AND ASSUMPTIONS FIGURE NUMBER Efficiency VR1 Using CSD87381P FET Block, PIMB051H-0R56M, 1 x GRM31CR60G227ME11 + 1 x ZRB18AR60G476ME01, NDVCZ = LOW, Vout = 1 V Figure 7-13 Efficiency VR2 Using PIFE32251B-R68MS, 4 x ZRB18AR60G476ME01, NDVCZ = LOW, Vout = 1.8 V Figure 7-14 Efficiency VR3 Using CSD87381P FET Block, PIME051H-1R0MS, 2 x GRM31CR60G227ME11, NDVCZ = LOW, Vout = 3.3 V Figure 7-15 Efficiency VR4 Using CSD87381P FET Block, PIMB051H-0R56M, 1 x GRM31CR60G227ME11, NDVCZ = LOW, Vout = 1.2 V Figure 7-16 Efficiency VR5 Using CSD87381P FET Block, PIME051B-2R2MS, 8 x GRM21BR61A476ME15, NDVCZ = LOW, Vout = 5 V Figure 7-17 space Figure 7-13. Typical Efficiency for VR1 Figure 7-14. Typical Efficiency for VR2 |
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