DSP56364 datasheet(43/148 Pages) FREESCALE

43 / 148 page

External Memory Expansion Port (Port A)

DSP56364 Technical Data, Rev. 4.1

Freescale Semiconductor

3-27

Figure 3-14 DRAM Out-of-Page Wait States Selection Guide

Table 3-13 DRAM Out-of-Page and Refresh Timings, Four Wait States1, 2

No.

Characteristics3

Symbol

Expression

20 MHz4

30 MHz4

Unit

Min

Max

Min

Max

157

Random read or write cycle time

tRC

× T

250.0

—

166.7

—

158

RAS assertion to data valid (read)

tRAC

2.75

× T

C − 7.5

—

130.0

—

84.2

159

CAS assertion to data valid (read)

tCAC

1.25

× T

C − 7.5

—

55.0

—

34.2

160

Column address valid to data valid

(read)

tAA

1.5

× T

C − 7.5

—

67.5

—

42.5

161

CAS deassertion to data not valid

(read hold time)

tOFF

0.0

—

0.0

—

162

RAS deassertion to RAS assertion

tRP

1.75

× T

C − 4.0

83.5

—

54.3

—

163

RAS assertion pulse width

tRAS

3.25

× T

C − 4.0

158.5

—

104.3

—

164

CAS assertion to RAS deassertion

tRSH

1.75

× T

C − 4.0

83.5

—

54.3

—

Chip Frequency

(MHz)

DRAM Type

(tRAC ns)

100

4 Wait States

8 Wait States

11 Wait States

15 Wait States

Note: This figure should be use for primary selection. For exact and

detailed timings see the following tables.

120

AA0475

DSP56364 데이터시트(PDF) 43 Page - Freescale Semiconductor, Inc

DSP56364 데이터시트(HTML) 43 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL