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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56364 데이터시트(PDF) 68 Page - Freescale Semiconductor, Inc |
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DSP56364 데이터시트(HTML) 68 Page - Freescale Semiconductor, Inc |
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68 / 148 page  GPIO Timing DSP56364 Technical Data, Rev. 4.1 3-52 Freescale Semiconductor Figure 3-26 ESAI HCKR Timing 3.14 GPIO Timing Table 3-21 GPIO Timing No. Characteristics1 1 V CC = 3.3 V ± 0.16 V; TJ = 0°C to +105°C, CL = 50 pF Expression Min Max Unit 4902 2 Valid only when PLL enabled with multiplication factor equal to one. EXTAL edge to GPIO out valid (GPIO out delay time) — 32.8 ns 491 EXTAL edge to GPIO out not valid (GPIO out hold time) 4.8 — ns 492 GPIO In valid to EXTAL edge (GPIO in set-up time) 10.2 — ns 493 EXTAL edge to GPIO in not valid (GPIO in hold time) 1.8 — ns 4942 Fetch to EXTAL edge before GPIO change 6.75 × T C-1.8 65.7 — ns 495 GPIO out rise time — — 13 ns 496 GPIO out fall time — — 13 ns HCKR SCKR (output) 465 463 |
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