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ADSP-SC596 데이터시트(PDF) 44 Page - Analog Devices

부품명 ADSP-SC596
상세설명  SHARC Dual-Core DSP with Arm Cortex-A55
PDF  134 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADSP-SC596 데이터시트(HTML) 44 Page - Analog Devices

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ADSP-SC595/SC596/SC598
Preliminary Technical Data
Rev. PrD
|
Page 44 of 134
|
May 2022
ADSP-SC595/SC596/SC598 DESIGNER QUICK REFERENCE
Table 21 provides a quick reference summary of pin related
information for circuit board design. The columns in this table
provide the following information:
• The signal name column includes the signal name for every
pin and the GPIO multiplexed pin function, where
applicable.
• The type column identifies the I/O type or supply type of
the pin. The abbreviations used in this column are analog
(a), supply (s), ground (g) and Input, Output, and InOut.
• The driver type column identifies the driver type used by
the corresponding pin. The driver types are defined in the
Output Drive Currents section of this data sheet.
• The internal termination column specifies the termination
present after the processor is powered up (both during
reset and after reset).
• The reset termination column specifies the termination
present when the processor is in the reset state.
• The reset drive column specifies the active drive on the sig-
nal when the processor is in the reset state.
• The power domain column specifies the power supply
domain in which the signal resides.
• The description and notes column identifies any special
requirements or characteristics for a signal. These recom-
mendations apply whether or not the hardware block
associated with the signal is featured on the product. If no
special requirements are listed, the signal can be left uncon-
nected if it is not used. For multiplexed GPIO pins, this
column identifies the functions available on the pin.
Table 21. ADSP-SC595/SC596/SC598 Designer Quick Reference
Signal Name
Type
Driver
Type
Internal
Termination
Reset
Termination
Reset
Drive
Power
Domain
Description and Notes
DAI0_PIN01
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 1
Notes: See note2
DAI0_PIN02
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 2
Notes: See note2
DAI0_PIN03
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 3
Notes: See note2
DAI0_PIN04
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 4
Notes: See note2
DAI0_PIN05
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 5
Notes: See note2
DAI0_PIN06
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 6
Notes: See note2
DAI0_PIN07
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 7
Notes: See note2
DAI0_PIN08
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 8
Notes: See note2
DAI0_PIN09
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 9
Notes: See note2
DAI0_PIN10
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 10
Notes: See note2
DAI0_PIN11
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 11
Notes: See note2
DAI0_PIN12
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 12
Notes: See note2
DAI0_PIN13
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 13
Notes: See note2
DAI0_PIN14
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 14
Notes: See note2
DAI0_PIN15
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: DAI0 Pin 15
Notes: See note2



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