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ADSP-SC596 데이터시트(PDF) 59 Page - Analog Devices

부품명 ADSP-SC596
상세설명  SHARC Dual-Core DSP with Arm Cortex-A55
PDF  134 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADSP-SC596 데이터시트(HTML) 59 Page - Analog Devices

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ADSP-SC595/SC596/SC598
Preliminary Technical Data
Rev. PrD
|
Page 59 of 134
|
May 2022
SYS_BMODE0
Input
NA
None
None
None
VDD_EXT
Desc: Boot Mode Control 0
Notes: Cannot be left unconnected
SYS_BMODE1
Input
NA
None
None
None
VDD_EXT
Desc: Boot Mode Control 1
Notes: Cannot be left unconnected
SYS_BMODE2
Input
NA
None
None
None
VDD_EXT
Desc: Boot Mode Control 2
Notes: Cannot be left unconnected
SYS_CLKIN0
a
NA
None
None
None
VDD_REF
Desc: Clock/Crystal Input
Notes: Cannot be left unconnected
SYS_CLKIN1
a
NA
None
None
None
VDD_REF
Desc: Clock/Crystal Input
Notes: Cannot be left unconnected
SYS_CLKOUT
Output A
None
None
L
VDD_EXT
Desc: Processor Clock Output
Notes: No notes
SYS_FAULT
InOut
A
None
None
None
VDD_EXT
Desc: Active-High Fault Output
Notes: External pull-down required to keep
signal in deasserted state
SYS_FAULT
InOut
A
None
None
None
VDD_EXT
Desc: Active-Low Fault Output
Notes: External pull-up required to keep
signal in deasserted state
SYS_HWRST
Input
NA
None
None
None
VDD_EXT
Desc: Processor Hardware Reset Control
Notes: Cannot be left unconnected
SYS_RESOUT
Output A
None
None
L
VDD_EXT
Desc: Reset Output
Notes: No notes
SYS_XTAL0
a
NA
None
None
None
VDD_REF
Desc: Crystal Output
Notes: Leave unconnected if an oscillator
provides SYS_CLKIN0
SYS_XTAL1
a
None
None
None
VDD_REF
Desc: Crystal Output
Notes: Leave unconnected if an oscillator
provides SYS_CLKIN1
VDD_ANA
s
None
None
None
Desc: Analog VDD
Notes: No notes
VDD_DMC
s
None
None
None
Desc: DMC VDD
Notes: No notes
VDD_EXT
s
None
None
None
Desc: External Voltage Domain
Notes: No notes
VDD_INT
s
None
None
None
Desc: Internal Voltage Domain
Notes: No notes
VDD_PLL
s
None
None
None
Desc: PLL VDD
Notes: Connect to VDD_INT. For lower noise
on VDD_PLL, filtering on VDD_INT is recom-
mended before connecting to VDD_PLL.
VDD_REF
s
None
None
None
Desc: External Voltage Domain
Notes: No notes
1 Disabled by default.
2 When present, the internal pull-up/pull-down design holds the internal path from the pins at the expected logic levels. To pull up or pull down the external pads to the expected
logic levels, use external resistors.
Table 21. ADSP-SC595/SC596/SC598 Designer Quick Reference (Continued)
Signal Name
Type
Driver
Type
Internal
Termination
Reset
Termination
Reset
Drive
Power
Domain
Description and Notes



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