ADSP-SC596 datasheet(89/134 Pages) AD

89 / 134 page

Rev. PrD

Page 89 of 134

May 2022

ADSP-SC595/SC596/SC598

Preliminary Technical Data

SPI Port—Open Drain Mode (ODM) Timing

In Figure 23 and Figure 24, the outputs can be SPIx_MOSI, SPIx_MISO, SPIx_D2, and/or SPIx_D3, depending on the mode of operation.

CPOL and CPHA are configuration bits in the SPI_CTL register.

Table 53. SPI Port—ODM Master Mode Timing1

1 All specifications apply to all three SPIs.

All specifications are based on simulation data and are subject to change without notice.

Parameter

Min

Max

Unit

Switching Characteristics

tHDSPIODMM

SPIx_CLK Edge to High Impedance From Data Out Valid

–1.5

tDDSPIODMM

SPIx_CLK Edge to Data Out Valid From High Impedance

Figure 23. ODM Master Mode

Table 54. SPI Port—ODM Slave Mode1

1 All specifications apply to all three SPIs.

All specifications are based on simulation data and are subject to change without notice.

Parameter

Min

Max

Unit

Timing Requirements

tHDSPIODMS

SPIx_CLK Edge to High Impedance From Data Out Valid

tDDSPIODMS

SPIx_CLK Edge to Data Out Valid From High Impedance

SPIx_CLK

(CPOL = 0)

tHDSPIODMM

SPIx_CLK

(CPOL = 1)

tDDSPIODMM

tHDSPIODMM

OUTPUT

(CPHA = 1)

OUTPUT

(CPHA = 0)

ADSP-SC596 데이터시트(PDF) 89 Page - Analog Devices

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