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ADSP-SC596 데이터시트(PDF) 55 Page - Analog Devices

부품명 ADSP-SC596
상세설명  SHARC Dual-Core DSP with Arm Cortex-A55
PDF  134 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADSP-SC596 데이터시트(HTML) 55 Page - Analog Devices

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ADSP-SC595/SC596/SC598
Preliminary Technical Data
Rev. PrD
|
Page 55 of 134
|
May 2022
PE_11
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTE Position 11 | EMAC1 Reference
Clock | SHARC2 Core Flag 7
Notes: See note2
PE_12
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTE Position 12 | EMAC1 Transmit
Enable | SHARC1 Core Flag 8
Notes: See note2
PE_13
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTE Position 13 | EMAC1 Transmit
Data D0 | SHARC2 Core Flag 13
Notes: See note2
PE_14
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTE Position 14 | EMAC1 Transmit
Data D1 | SPI2 Slave Select Output 7
Notes: See note2
PE_15
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTE Position 15 | EMAC1 Receive
Data D0 | SPI0 Slave Select Output 6
Notes: See note2
PF_00
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 0 | EMAC1 Receive Data
D1 | SPI0 Slave Select Output 7 | SPI3 Ready
Notes: See note2
PF_01
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 1 | EMAC1 Serial
Management Bidirectional Data | SHARC1
Core Flag 7
Notes: See note2
PF_02
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 2 | EMAC1 Serial
Management Clock | SHARC1 Core Flag 6
Notes: See note2
PF_03
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 3 | EMAC1 Carrier Sense
| SHARC1 Core Flag 10 | USBC0 USBC Stop
Output Control
Notes: See note2
PF_04
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 4 | USBC0 USBC Data 7
| TIMER0 Timer Alternate Clock 13
Notes: See note2
PF_05
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 5 | MLB0 Clock Output
| USBC0 USBC Data 6 | TIMER0 Timer Clock
Notes: See note2
PF_06
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 6 | SPI1 Slave Select
Output 7 | SHARC2 Core Flag 2 | USBC0 USBC
Data 5
Notes: See note2
PF_07
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 7 | SPI3 Slave Select
Output 2 | SHARC2 Core Flag 3 | USBC0 USBC
Data 4
Notes: See note2
PF_08
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 8 | SPI3 Slave Select
Output 6 | SHARC2 Core Flag 8 | TIMER0 Timer
11 | USBC0 USBC Next Data Control
Notes: See note2
PF_09
InOut
A
Programmable
pull-up/pull-down1
None
None
VDD_EXT
Desc: PORTF Position 9 | SHARC1 Core Flag 9
| USBC0 USBC Data Direction Control
Notes: See note2
Table 21. ADSP-SC595/SC596/SC598 Designer Quick Reference (Continued)
Signal Name
Type
Driver
Type
Internal
Termination
Reset
Termination
Reset
Drive
Power
Domain
Description and Notes



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