ADSP-SC596 datasheet(116/134 Pages) AD

116 / 134 page

Rev. PrD

Page 116 of 134

May 2022

ADSP-SC595/SC596/SC598

Preliminary Technical Data

The ac timing specifications of the 6-pin MLB interface is detailed in Table 82. Refer to the Media Local Bus Specification version 4.2 for

more details.

Figure 57. MLB Timing (3-Pin Interface)

Table 82. 6-Pin MLB Interface Specifications

All specifications are based on simulation data and are subject to change without notice.

Parameter

Conditions

Min

Typ

Max

Unit

tMT

Differential Transition Time at the Input Pin (See Figure 58)

20% to 80% VIN+/VIN–

80% to 20% VIN+/VIN–

fMCKE

MLBCP/N External Clock Operating Frequency (See Figure 59)1

1 fMCKE (maximum) and fMCKR (maximum) include maximum cycle to cycle system jitter (tJITTER) of 600 ps for a bit error rate of 10E-9.

2048 × FS at 44.0 kHz

90.112

MHz

2048 × FS at 50.0 kHz

102.4

MHz

fMCKR

Recovered Clock Operating Frequency (Internal, Not Observable

at Pins, Only for Timing References) (See Figure 59)

2048 × FS at 44.0 kHz

90.112

MHz

2048 × FS at 50.0 kHz

102.4

MHz

tDELAY Transmitter MLBSP/N (MLBDP/N) Output Valid From Transition of

MLBCP/N (Low to High) (See Figure 60)

fMCKR = 2048 × FS

0.6

tPHZ

Disable Turnaround Time From Transition of MLBCP/N (Low to High)

(See Figure 61)

fMCKR = 2048 × FS

0.6

tPLZ

Enable Turnaround Time From Transition of MLBCP/N (Low to High)

(See Figure 61)

fMCKR = 2048 × FS

0.6

11.2

tSU

MLBSP/N (MLBDP/N) Valid to Transition of MLBCP/N (Low to High)

(See Figure 60)

fMCKR = 2048 × FS

tHD

MLBSP/N (MLBDP/N) Hold From Transition of MLBCP/N (Low to High)

(See Figure 60)2

2 Receivers must latch MLBSP/N (MLBDP/N) data within tHD (minimum) of the rising edge of MLBCP/N.

0.6

tMCKH

MLB_SIG/

MLB_DAT

(Rx, Input)

tMCKL

tMCKR

MLB_SIG/

MLB_DAT

(Tx, Output)

tMCFDZ

tDSMCF

MLB_CLK

tMLBCLK

VALID

tDHMCF

tMCKF

tMCDRV

VALID

tMDZH

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